Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Silicon Labs/Series1/EFM32GG11B/EFM32GG11B820F2048IQ100/ETH/OCTETSTXEDBOTTOM#0x0
Octets transmitted 31:0
Transmitted octets in frame without errors [31:0]
https://github.com/cmsis-svd/cmsis-svd-data